Fabrication and characterization of metal-to-metal interconnect structures for 3-D integration

Abstract

Interconnections between silicon layers in 3D integrated devices may be achieved by a number of methods. The use of non-collapsible metal-to-metal pad bonding provides robust mechanical and electrical connections that can be applied to sub-10 µm tab sizes and achieve greater than 1x10^5/cm2 interconnect densities. Of particular interest are Cu-Cu thermocompression bonding and Cu/Sn-Cu solid liquid diffusion bonding processes. RTI has been developing and characterizing these interconnection processes, demonstrating bonding between pads less than 15 microns in diameter in large area array configurations. Cu and Cu-Sn bump fabrication processes have been developed that provide well-controlled surface topography necessary for the formation of low resistance, high yielding, and reliable interconnects. The electrical resistance and yield has been quantified based on electrical measurements of daisy chain test structures. The mechanical strength of the bonding has been quantified through die shear testing. The reliability has been characterized through studies of the impact of thermal exposure on the mechanical performance of the bonds. Cross-section SEM analysis, coupled with high resolution energy dispersive spectroscopy, has provided insight into the physical and chemical nature of the bonding interfaces and aided in the evaluation of the long-term stability of the bonds. The driving force for the investigations are high performance 3D integrated electronic and optoelectronic component and subsystem applications.